;/*****************************************************************************
; * @file:    startup_1901VC1.s
; * @purpose: CMSIS Cortex-M3 Core Device Startup File for the 
; *           Milandr 1901VC1 device series 
; * @version: 
; * @date:    
; *****************************************************************************
; * @copy
; *
; * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
; * TIME. AS A RESULT, PHYTON SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
; * OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
; * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
; * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
; *
; * <h2><center>&copy; COPYRIGHT 2010 Phyton</center></h2>
; ******************************************************************************
; * FILE startup_1901VC1.s
; */

; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>

Stack_Size      EQU     0x00000400

                AREA    STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem       SPACE   Stack_Size
__initial_sp


; <h> Heap Configuration
;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>

Heap_Size       EQU     0x00000200

                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem        SPACE   Heap_Size
__heap_limit

                PRESERVE8
                THUMB


; Vector Table Mapped to Address 0 at Reset

                AREA    RESET, DATA, READONLY
                EXPORT  __Vectors

__Vectors       DCD     __initial_sp              ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     MemManage_Handler         ; MPU Fault Handler
                DCD     BusFault_Handler          ; Bus Fault Handler
                DCD     UsageFault_Handler        ; Usage Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     DebugMon_Handler          ; Debug Monitor Handler
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler

                ; External Interrupts
                DCD     SSP3_IRQ_H      
                DCD     SSP4_IRQ_H      
                DCD     USB_IRQ_H       
                DCD     BSP1_IRQ_H      
                DCD     BSP2_IRQ_H      
                DCD     DMA_IRQ_H       
                DCD     UART1_IRQ_H     
                DCD     UART2_IRQ_H     
                DCD     SSP1_IRQ_H      
                DCD     BSP3_IRQ_H      
                DCD     I2C_IRQ_H       
                DCD     PWR_IRQ_H       
                DCD     WDT_IRQ_H  
                DCD     DSP_DMA_IRQ_H
                DCD     TIM1_IRQ_H  
                DCD     TIM2_IRQ_H  
                DCD     TIM3_IRQ_H  
                DCD     ADC_IRQ_H	
                DCD     SDIO_IRQ_H            
                DCD     CMP_IRQ_H     
                DCD     SSP2_IRQ_H    
                DCD     ACD_IRQ_H     
                DCD     CRPT_H        
                DCD     TIM_IRQ_H     
                DCD     DSP_IRQ_H     
                DCD     DSP_IDLE_H             
                DCD     UART3_IRQ_H   
                DCD     BKP_IRQ_H     
                DCD     PIN1_IRQ_H    
                DCD     PIN2_IRQ_H    
                DCD     PIN3_IRQ_H    
                DCD     PIN4_IRQ_H    


                AREA    |.text|, CODE, READONLY

                
                
                
                
; Reset Handler
Reset_Handler   PROC
                EXPORT  Reset_Handler             [WEAK]
                IMPORT  __main
                LDR     R0, =__main
				LDR     R0, =__main
                BX      R0
                ENDP


; Dummy Exception Handlers (infinite loops which can be modified)

NMI_Handler     PROC
                EXPORT  NMI_Handler               [WEAK]
                B       .
                ENDP
HardFault_Handler\
                PROC
                EXPORT  HardFault_Handler         [WEAK]
                B       .
                ENDP
MemManage_Handler\
                PROC
                EXPORT  MemManage_Handler         [WEAK]
                B       .
                ENDP
BusFault_Handler\
                PROC
                EXPORT  BusFault_Handler          [WEAK]
                B       .
                ENDP
UsageFault_Handler\
                PROC
                EXPORT  UsageFault_Handler        [WEAK]
                B       .
                ENDP
SVC_Handler     PROC
                EXPORT  SVC_Handler               [WEAK]
                B       .
                ENDP
DebugMon_Handler\
                PROC
                EXPORT  DebugMon_Handler          [WEAK]
                B       .
                ENDP
PendSV_Handler  PROC
                EXPORT  PendSV_Handler            [WEAK]
                B       .
                ENDP
SysTick_Handler PROC
                EXPORT  SysTick_Handler           [WEAK]
                B       .
                ENDP

DMA_IRQ_H PROC
                EXPORT  DMA_IRQ_H	        [WEAK]
                B       .
                ENDP

Default_Handler PROC

                EXPORT  SSP3_IRQ_H        [WEAK]
                EXPORT  SSP4_IRQ_H        [WEAK]
                EXPORT  USB_IRQ_H         [WEAK]
                EXPORT  BSP1_IRQ_H        [WEAK]
                EXPORT  BSP2_IRQ_H        [WEAK]
                
                EXPORT  UART1_IRQ_H       [WEAK]
                EXPORT  UART2_IRQ_H       [WEAK]
                EXPORT  SSP1_IRQ_H        [WEAK]
                EXPORT  BSP3_IRQ_H        [WEAK]
                EXPORT  I2C_IRQ_H         [WEAK]
                EXPORT  PWR_IRQ_H         [WEAK]
                EXPORT  WDT_IRQ_H         [WEAK]
				EXPORT  DSP_DMA_IRQ_H     [WEAK]				
				EXPORT  TIM1_IRQ_H        [WEAK]
                EXPORT  TIM2_IRQ_H        [WEAK]
                EXPORT  TIM3_IRQ_H        [WEAK]
                EXPORT  ADC_IRQ_H	      [WEAK]
                EXPORT  SDIO_IRQ_H	      [WEAK]
                EXPORT  CMP_IRQ_H         [WEAK]
                EXPORT  SSP2_IRQ_H        [WEAK]
                EXPORT  ACD_IRQ_H         [WEAK]
                EXPORT  CRPT_H            [WEAK]
                EXPORT  TIM_IRQ_H         [WEAK]
                EXPORT  DSP_IRQ_H         [WEAK]
                EXPORT  DSP_IDLE_H        [WEAK]
				EXPORT  UART3_IRQ_H       [WEAK]
                EXPORT  BKP_IRQ_H         [WEAK]
                EXPORT  PIN1_IRQ_H        [WEAK]
                EXPORT  PIN2_IRQ_H        [WEAK]
                EXPORT  PIN3_IRQ_H        [WEAK]
                EXPORT  PIN4_IRQ_H        [WEAK]
                
SSP3_IRQ_H  
SSP4_IRQ_H  
USB_IRQ_H   
BSP1_IRQ_H  
BSP2_IRQ_H  

UART1_IRQ_H 
UART2_IRQ_H 
SSP1_IRQ_H  
BSP3_IRQ_H  
I2C_IRQ_H   
PWR_IRQ_H   
WDT_IRQ_H   
DSP_DMA_IRQ_H
TIM1_IRQ_H  
TIM2_IRQ_H  
TIM3_IRQ_H  
ADC_IRQ_H	
SDIO_IRQ_H	
CMP_IRQ_H   
SSP2_IRQ_H  
ACD_IRQ_H   
CRPT_H      
TIM_IRQ_H   
DSP_IRQ_H   
DSP_IDLE_H
UART3_IRQ_H 
BKP_IRQ_H   
PIN1_IRQ_H  
PIN2_IRQ_H  
PIN3_IRQ_H  
PIN4_IRQ_H 


				B       .

                ENDP


                ALIGN


; User Initial Stack & Heap

                IF      :DEF:__MICROLIB
                
                EXPORT  __initial_sp
                EXPORT  __heap_base
                EXPORT  __heap_limit
                
                ELSE
                
                IMPORT  __use_two_region_memory
                EXPORT  __user_initial_stackheap
__user_initial_stackheap

                LDR     R0, =  Heap_Mem
                LDR     R1, =(Stack_Mem + Stack_Size)
                LDR     R2, = (Heap_Mem +  Heap_Size)
                LDR     R3, = Stack_Mem
                BX      LR

                ALIGN

                ENDIF


                END

;/******************* (C) COPYRIGHT 2010 Phyton *********************************
;*
;* END OF FILE startup_1986BE9x.s */
